# Signal processor (hardware)

** digital signal processors** (English. *digitally processor,* DSP **)** serve signal the continuous digital treatment of similar signals (z. B. Audio or video signals).

They do not only serve as replacement for complex similar filter technology, but can in addition tasks to implement, similaronly heavily or not at all solvable are:

- Frequency-selective filter of high order with small phase error (z. B. Sound influence when merging and in mixers)
- dynamic compression and intercarrier noise suppressor with dynamic (adaptive) parameters
- noise blanking with consideration of the character of the signal
- implementation of effects howTo echo, resound or Verfremdung of the Singstimme
- data compression for digital subsequent treatment

DSPs contained for this at the entrance and exit usually also the necessary A/D and D/A transducer as well as always one on relevant mathematical operations speed-optimized processor (CCU).

## Table of contents |

## real time ability

a DSP must be able to surely process a certain data set per time unit. This results from the demand of a usually fixed and from the outside given scanning rate with whichthe input data into the DSP arrive and/or. the finished data to be again written must. Kind “handshake” or temporal stopping during the data processing is not possible with this real timable processing, since this would lead in the digital signal to losses.

DSPsbecome real timable by the following mechanisms:

- Special synchronous, serial interfaces for the input and output of the digital signals
- so-called ones of MAC instructions for the simultaneous multiplication and addition in a machine instruction.
- Address generators for the implementation of loops and Ringbufferstrukturen with no Overhead in terms of software.
- Implementation of the processor exclusive in Harvard architecture.
- Existence of a dedicated hardware stack.
- No multitasking

## command sentence

### operations

- the existence of several arithmetic units (ALUs), under it an Multiply Accumulate arithmetic unit (MAC). This arithmetic unit makes those possibleOperation
**A* = A + B x C**in only one processor cycle and serves primarily the speed increase for spectral operations, for instance the computations necessary for the fast Fourier transform or the folding.

### program sequence

- interlocking NO-overhead hardware Looping by means ofa dedicated loop stack.
- The today's DSPs is in addition often substantial parallel programmable, i.e. in only one processor cycle several computing and/or memory transfer operations can be accomplished at the same time.
- Prefetch and Predecoding of the instructions (Pipelining) for an extremely high remark speed of the instructions.

## history

of the ADSP-21065L of similar to DEVICEs permits - instruction to the following in-cyclic assembler languages:

F0=F3*F7, F1=F11+F15, F2=F11-F15, DM (I0, M1) =F2, F3=PM (I8, M9);

in which quasi-simultaneous a floating point multiplication, a floating point addition, a floating point subtraction, a write access on the memory with modulo - as well as cyclic Postincrement/decrementa read access on the memory with modulo-cyclic Postincrement/decrement takes place.

However also increasingly elements of DSPs appear, like for example in the AltiVec - extensions of the PowerPC or ( weakened) into the SIMD - extensions of Intel and AMD in Desktop CCUs.This is because of the increasing spreading of data formats such as JPEG, MP3 or MPEG2, whose DCT - coding and/or - is actually decoding a classical DSP task.

## Web on the left of

- E-DSP - basic knowledge for DSP, DSP on the MCU and books